Plate-shaped sensor elements of semiconductor material are applied in Hall elements and in other sensor elements having a Van der Pauw structure, such as the stress sensor known from Mian, A.; Suhling, J. C.; Jaeger, R. C., “The van der Pauw stress sensor,” Sensors Journal, IEEE, vol. 6, no. 2, pp. 340, 356, April 2006. Both the Hall elements and the sensor elements having a Van der Pauw structure are constructionally similar to one another, but use different measurements to derive information on the physical quantity to be measured (e.g. magnetic field versus stress).
Hall sensors are magnetic sensors based on the Hall effect, which was discovered by E. H. Hall in 1879. A basic Hall device consist of a conducting material provided with at least four electrical contacts. In order to make use of the Hall effect, a current has to flow through the device. A bias current I is supplied via two of the contacts, which will be referred to as the current contacts. Two other contacts, referred to as the sense contacts, are typically placed on an equipotential line, to make the voltage difference between the sense contacts zero in the absence of a magnetic field. The principle of measuring a magnetic field component Bz using a horizontal Hall element is illustrated in FIG. 1(a). For a Hall readout, the current contacts A, C and sense contacts B, D alternate with each other. If a current I is applied to the current contacts A, C, and if an out-of-plane magnetic field Bz is applied to the device, a Hall voltage VH proportional to the applied magnetic field Bz will appear between the sense contacts B, D; in other words, VH=VB−VD.
There are two common approaches for realizing the biasing current. One approach uses a current source, in which case the applied current I is precisely known (I=Iex). A possible implementation of this case is shown FIG. 1(b). The other approach uses a voltage source, in which case the voltage over the plate is precisely defined (V=Vex). An implementation of this type is shown in FIG. 1(c). When applying current-biasing, the voltage over the plate depends on the total resistivity of the plate. In the case of voltage-biasing, the current flowing through the plate is not exactly known, but is determined by the total resistivity of the plate.
Hall elements can easily be integrated in semi-conducting devices, e.g. in CMOS technology, which implies that they can be combined with advanced on-chip readout circuitry. An implication of the Hall device being co-integrated with other (e.g. readout) devices, is that the Hall element needs to be electrically isolated from the substrate and other components. In integrated technologies, this can be accomplished by using reverse-biased PN-junctions.
In FIG. 2, a cross section of an integrated horizontal Hall plate is shown, cut along the line where the excitation is applied (line through the contacts A and C in FIG. 1(a)). By way of example, a CMOS process using a p-type substrate has been illustrated. The actual Hall plate then consists of the n-type material of an n-well. In this example, also a p-type covering layer (top shield) is illustrated on top, which is often provided for one or more of various reasons (improved shielding, less noise of the device, etc). In FIG. 2, both substrate and top shield are connected to ground (0 V). During Hall readout, a current I has to flow through the plate. For this purpose, node A and node C must be at a different voltage. By way of example, it is assumed here that the applied biasing method results in 3.0 V at node A, and 1.0 V at node C. As is well known from the theory of PN-junctions, at any transition between p-type and n-type material a depletion region is formed. The biasing is done in such a way that the PN junctions are always reverse-biased. The reverse-biased transitions provide electrical isolation of the plate. The isolating depletion regions extend into the Hall plate, near the p-type substrate and the p-type cover (grayed areas in FIG. 2), and have a low number of free charge carriers (i.e. these regions can be considered as nearly perfect isolators). As a result, the effective thickness of the Hall plate is reduced. The actual size of the depletion zone varies in a non-linear way with the local (reverse) voltage over the PN-junctions. This reverse-voltage varies over the plate, being the largest at the node where the current enters (node A at higher potential), and the smallest at the node where the current leaves (node C at lower potential). As a result, the plate thickness (d1 in FIG. 2) at the high-voltage side is smaller than the plate thickness (d2 in FIG. 2) at the low-voltage side, implying a non-uniformity of the plate thickness in the direction from A to C. In other words, the thickness of the Hall plate is not constant, but varies over the plate. Unfortunately, when using current biasing, the effectively applied voltages (between nodes A and C) depend strongly on temperature, but also piezoresistive stress-effects and even the Hall effect itself affects the voltages (i.e. the voltages also vary in the X-direction of FIG. 2). Because these effects modulate the thickness of the plate, they affect the sensitivity and the linearity of the magnetic sensor.
An important characteristic of a Hall sensor is the (magnetic) sensitivity. Ideally, the sensitivity is a constant value, and the measured Hall voltage is a linear function of the magnetic field strength, independent of temperature, stress, etc. In practice, however, this is not entirely true. Yet, in many applications (such as for example in Hall-based linear current sensors), the absolute accuracy of the sensitivity is important. This means that the cross-sensitivities with environmental conditions like temperature, stress, etc. should be reduced, or that at least there is the possibility to compensate for them. Additionally, the dependence of the sensitivity on the Hall voltage, the latter being dependent on the applied magnetic field, implies that the sensor characteristic becomes a non-linear function of the magnetic field.
Several methods for reducing non-linearity due to the junction effect have been proposed in the prior art. In R. S. Popovic, “Hall Effect Devices, Second Edition”, Taylor & Francis, ISBN 9780750308557, plate thickness modulation in junction-isolated Hall devices has been described. It has been identified as an additional source of non-linearity because of the modulation of the plate thickness by the Hall voltage itself.
FIG. 3 shows a circuit proposed for reducing this non-linearity. The dashed square represents the shield that surrounds the active area of the Hall device. However, this circuit may not be suitable for all contemporary CMOS technologies, as the potential of all the shielding regions cannot always be chosen freely. For instance, in many technologies with p-type substrate, the substrate must be at a fixed ground potential. Furthermore, the practical approach to biasing shown in FIG. 3 is not fully specified. It is only defined that one sense terminal is at a fixed potential, and a current I is flowing through the Hall plate. How this can be accomplished is not described.
Another prior art circuit as proposed by C. Schott and R. S. Popovic in “Linearizing integrated Hall devices”, Transducers '97, International Conference on Solid State Sensors and Actuators, Chicago, 16-19 Jun. 1997, Vol. 1, pp. 393-396, is shown in FIG. 4. Also in this circuit, the shield voltage is driven, more particularly by signal dependent values determined by averaging the output voltages of the two sense contacts and subtracting therefrom a target reverse-bias voltage. The resulting voltage is then used to drive the shield. In practice, it is not always possible to change the potential of the shield, especially when the substrate is part of the surrounding shield. For instance, when the substrate defines the lower side of the Hall device, since the substrate is common for the whole chip, it therefore needs to be set at the lowest voltage (i.e. ground level) in case of a p-type substrate.
Two other prior art circuits as proposed by K. Matsui, S. Tanaka and T. Kobayashi in “GaAs Hall generator application to a current and watt meter”, Proc. 1st Sensor Symp. Ed. S. Kataoka (Tokyo: Institute of Electrical Engineers of Japan), pp. 37-40, 1981 are shown in FIG. 5, where the sensed voltage is amplified. In the circuit of FIG. 5(a), a large common mode voltage exists, which is disadvantageous for accurate amplification. That problem is solved in FIG. 5(b), where the left sense contact is kept at virtual ground by means of an Operational Amplifier OA. Thus the full Hall voltage appears at the right sense contact, which is amplified with respect to ground by amplifier A.